; ; ; ; year 2566 in Buddha Sasana Calendar ... : 2022 : September : 6 (Tuesday) : Updated : Processor ;

; ; ; ; year 2566 in Buddha Sasana Calendar ... : 2022 : 9 : 6 : Updated : Processor ;

step-by-step, a (Method, Procedure, Technique) of fetching instructions ( y), in addition to line-by-line ( x) ... ;

( I, I, I, I) wrote: WHAT is the diff between "step-by-step" and "line-by-line" regarding computing ( Processor)?

well trained kids!! replied: Umm!! Umm!! in the era of Translator based (since 1990s), step-by-step method belongs to pipelining (computer architecture: instructions) sir; "line-by-line" method is prior to 1990s, in the era of batch processing, and line-by-line method is related to Calculator based (since 1970s), ... ; Have you already designed & modeled (box-by-box, sheet-by-sheet, side-by-side) method of ZCS based sir?

( I, I, I, I) wrote: in 2020s or later ones design model (Remark: very soon available to public as marketing, i.e. Double Edges Processors (2 sided a.k.a. side-by-side)) of ... ; You need to realize and understand Idea Processor 1st, regarding wrapping of 6 light sheets, 6 ZCS (s), Z-Folding (Remark: "Z-Folding" is originally by Korean design model), ... ; Also see: s Computer;

I wrote: because of ( opt o coupler     opt o coupler     opt o coupler (light emitting, light sensitive) component to couple isolated circuits (circuit; circumference; lap; Radical510) e.g. Automotive opt o coupler, plastic opt o coupler, hermetic opt o coupler;) vs. ( opt o isolator     opt o isolator     opt o isolator ; ), WHAT kind of (chip, chipset, Processor ) are going to be available to public soon? Remark: 2565; 2022; Also see: Optics; Physics Law 234; Processor;

well trained kids!! replied: Double Edges Processors (2 sided a.k.a. side-by-side) will be in marketing soon, SO IT will be available to public sir; HA!! HA!!

I wrote: ( doshite Why, doshite Why, doshite Why, doshite Why) do I ("Tarzan") need "Double Edges Processor" ?

well trained kids!! replied: a part of 6 surfaced DEE Box in Z-index R&D results, 2 flat surfaces, 2 sides of the 6 surfaced ones, 2 ZCS (s), ... can be computing at the same time sir; Umm!! Umm!!

I wrote: iroColourWaveForm 's (one of the defined wavelengths) : ( Layer's thickness in nm) < ((the defined wavelength) / 2), leaking of the light may begin (Double Edges Processor, photonic circuit, PV, USB light strings) ... ; Also see: Optics; Physics Law 58; Remark: in 2020s, Korean designed & modeled ZCS (s) e.g. Z-Fold surfaces are somehow already available to public; if you're not a "Tarzan" like me, e.g. a person WHO has been with "own lab" And Then, WHAT would you like to do R&D on IT ?

well trained kids!! replied: Umm!! Umm!! in addition to ((the defined wavelength) / 2), we would do R&D e.g. by (1/2, 1/3, 1/4), also by (-2, -3, -4) for each defined wavelength, for each layer;

I wrote: I've a quiz now, i.e. regarding (for each defined wavelength), (for each layer), WHEN "leaking of the light" is (indicated, marked, measured), WHICH Keyword would you like to ((choose, select) . ( k a n k e t s u Brevity, concise and exact use of words)) either light emitting, or light sensitive ?

well trained kids!! replied: We'll (choose, select) "light sensitive" sir; another aesthetics knowledge based for "Double Edges Processor" for (2 ZCS layers) computing of 6 surfaced DEE Box in Z-index sir;

I wrote: don't forget 5D (5 Dimensional), also see: structural Amino Acids, because I've my own reasons ... ; regarding "Double Edges Processor" for (2 ZCS layers), since directional gravity pressure for Anti-Earthquake has been defined, HOW would you like to hardware define 2 edges would be?

well trained kids!! replied: Umm!! Umm!! if one side is lime color, other side should be lavender color; if one side is green color, other side should be red color; if one side is aqua color, other side should be maroon color, ... sir;

I wrote: mochiron of course, one of the military top secrets again-and-again, and dual binary numbers may begin ... ; specification of "Double Edges Processor" for (2 ZCS layers) may not be available to public, because "our earth is not simple like WHAT I think" ... ; patent & trademark means open to public, e.g. Korea opens "Z-Folding" to public as mobile phone since 2020s, regarding "2 ZCS" layers ... take IT to the limit ... ; this DOMAIN developer has defined Manmade Global Weather (rain) in North Korea (for avoiding regional drought), for humanity purpose, by the way, because I (a.k.a. a "Tarzan" Rakhine American) truly like Korean foods, and Korean people, ... ;

well trained kids!! replied: can we use 5D (5 Dimensional) T D I H S C D P; (Also see: Battery; PHYSICS), regarding "Double Edges Processor" for (2 ZCS layers) sir?

I wrote: Keyword (s) you should know would be: Camera based (angle, degree), in addition to (compass, GPS); notice, realize, and understand THAT view of the defined camera's focal points ... , and I've a quiz i.e. if 2 groups are moving (e.g. avoiding Earthquake In Japan And Taiwan), And Then, WHAT kind of picture would you like to (choose, select)?

well trained kids!! replied: ware ware We'll (choose, select) sir;

I wrote: mochiron of course ( k a n k e t s u Brevity Keyword (s) : box-by-box, sheet-by-sheet, side-by-side) ... ; you need advance knowledge of (wrap, wrapped, wrapping) 6 surfaced DEE Box in Z-index, Umm!! Umm!! you'll be able to design & model WORMHOLE ways ... ; Remark: I've something more important to do nowadays

e.g. automatic BLI adjustment for human beings livable moons,
e.g. 8787+ commuter (Gravity Machine) imaginary hyperspace crafts,
e.g. 10000+ MPH anti-missile interceptors,
e.g. yellowish variation calculations for each human beings livable moon,
... , therefore I'll not design & model "Double Edges Processor" for (2 ZCS layers) but you should be able to do IT yourselves ... ; any question, let me know, I'll be helpful to you with (answer, solution) ... ; Also see: PHYSICS;

Processor ;

          pair Aqua ;  
        pair Black ;    
          pair Blue Gray ;
        pair Brown ;    
          pair Dark Blue ;
        pair Gold ;    
          pair Gray ;  
        pair Green ;    
          pair Lavender ;  
        pair Light Blue ;  
          pair Light Yellow ;
        pair Lime ;    
          pair Maroon ;  
        pair Orange ;    
          pair Pink ;  
        pair Purple ;    
          pair Red ;  
        pair Silver ;    
          pair White ;  
        pair Yellow ;    
        Also see: IoT; 8pComputer; Physics Law 198; Processor;  

doko WHERE is radio ?
WHY do we need processor? because, processor can handle multiple inputs ... ;
HOW to handle IO (Inputs, Outputs) ? answer would be: instructions defined by mnemonics;
can a system be without processor? yes, processor can be bypassed, but this is not common method;
WHAT is Idea Processor? in SQRT2 design model, e.g. mantissa point (mantissa point is doko WHERE floating point is truncated) beyond 128 bit can be understood;

G P U     G P U     G P U, e.g. generate code for G P U;

this DOMAIN 's Idea Processor, also see: Radicals;

5W1H of Processor ? simple Keyword would be: X On;

Remark: SQ mm (squared millimeter) of light sheet and its color codes would be HOW designing and modeling Gravity Dimension Computer (process, processed, processing, processor) ... ; Also see: PHYSICS, law one hundred and seventeen, and realize and understand HOW human beings livable moons' ACT3 imaginary hyper space crafts' processors are designed and modeled, e.g. 99% transparency plastic, Origin of Sound, yellow strings, ... ;

Remark: long long time ago in military science, "b" can only be defined IFF "a" as numerological one, verification of System Security may begin by monitoring "a" , "aa" , "aaa" , "aaaa" , ... a.k.a. one AND one method (refer to defined base); if war, opponent's radio stations can be compromised by this method, because, populating "a" without verifying true local processor; wrong IP Method, based on such "b" can only be defined ... ; global virus attack to opponents' system can be (Remark: billions of US dollar damage can be to financial systems, government systems, health systems); therefore, for each "a" , verify (about, Directional Gravity Pressure, Logo, OEM, power, SPL, System Number) And Then, notice that Anti Virus is Working ... ;

1   _ - N :
. . .   ā Ć O ϩ
  | \ ..

_ IFF base (CALCULATOR) 3_CRC Display。  

5W1H of Processor . hyper-v . Architecture;
of Processor . s p a r c . Architecture;
5W1H of Processor . Architecture . P PC . 601, 603, 604, ... ;
5W1H of Processor . Architecture . P PC . G3, 4, 5, ... ;
5W1H of Processor . Architecture . P PC . IBM i Series;
5W1H of Processor . Architecture . P PC . IBM p Series;
5W1H of Processor . Architecture . P PC . IBM RS / 6000;

5W1H of Processor . Architecture . Samsung . E x y n o s;
5W1H of Processor . Architecture . Trans meta . E f f i c e o n, ... ;
5W1H of Processor . Architecture . x86 . AMD A t h l o n, MP, XP, ... ;
5W1H of Processor . Architecture . x86 . AMD D u r o n;
5W1H of Processor . Architecture . x86 . AMD K6;
5W1H of Processor . Architecture . x86 . AMD S e m p r o n;
5W1H of Processor . Architecture . x86 . Intel Celeron, D, ... ;
5W1H of Processor . Architecture . x86 . Intel Pentium 1, 2, 3, 4, ... ;
5W1H of Processor . Architecture . x86 . Intel Xeon 32bit;
5W1H of Processor . Architecture . x86-64 . AMD A t h l o n 64, X2, ... ;
5W1H of Processor . Architecture . x86-64 . AMD O p t e r o n;
5W1H of Processor . Architecture . x86-64 . AMD S e m p r o n 64;
5W1H of Processor . Architecture . x86-64 . AMD T u r i o n 64;
5W1H of Processor . Architecture . x86-64 . Intel Pentium 4 Extreme;
5W1H of Processor . Architecture . x86-64 . Intel Pentium D;
5W1H of Processor . Architecture . x86-64 . Intel Xeon, MP, ... ;

Accumulator to Modulating controller to Multiplexer to Processor, a controller; Electronic engineering's product components with specific format, so called architecture, and each architecture provides detailed specification in assembly language; Till 2006, processor independent O S s [operating systems] have not engineered yet, because architectures' limitation, differences among architectural formats, net profit margin of marketing, and evolution of peripherals; also see: this DOMAIN 's numerological dimension ... ;

A M D ,  
processor ... ;              

Cache . L1 Data, i.e. 64 KB; Cache . L1 Instruction, i.e. 128 KB; Cache . L2 Write back, 1 MB; Cache . L3 ... ;

Computer engineering engineers emphasis throughputs, and Input and / or Output for each pin;
Electronic engineering engineers emphasis sampling rates, and floating point processing speeds;
Material engineering engineers emphasis heat / thermal with size and weight;
Mathematicians and Scientists emphasis control flows and logic flows;

Cores per Processor = Number;

Develop ACT3 stage parallel time processor ... ;

Developing 3D GUI, to do so, dual core or 2 processors are needed, 2D must be fixed "not variable", processor should be redesigned to be not only blocks but also triangles ... ; also see: Lucky88...88;

IFF Monbusho level knowledge enhancement, IFF engineering 3D GUI, do not forget "transparency glasses" WHERE application's location, size, ... , but they are all blocks i.e. rectangular only, therefore, 1 hardware designer should decide whether rectangular with extended triangle, or triangle without rectangular, or dual core both, or ... ; to do so, 1st to define object name (transparency glass) ... ; 2nd to26 be25 glasses; 3rd to do software R&D method e.g. in95 Basic, Transparency Glasses As Object Name;

      -     ;  
Digital Light Processor ( DLP ) ... ;    
            depth 26 ;

Diff Potential, e.g. ( positive, negative) ... ;

Remark: in "Thor" hammer design, WHEN several layers are parallel to each other together WHICH naturally prompts Diff Potential, And Then, using "handle" as neutral; regarding EM, do not forget yellow as core (refer to planet with EM), on the other hand, planet without EM (there is no yellow as core);

dual core (C I S C OR RISC) MULTI... ;

A R M ;            
C I S C , complex instruction set computing ;
( S                
) C P U            
... (                
  RISC , reduce d instruction computing ;  
  ... ; cache s ( L ) ;
device ; power ;            
E C C , error correcting code ;    
S o C , system s on chip ;  
T C O , total cost 66 owner ship ;
X Y Z ( XYZ ) ... ;    

Geometrical process, a.k.a. Process-geometry, i.e. Fujitsu 90 n meter, ... ;

(Green, Blue, Red, Yellow) e.g.

well trained kids! replied: you've Highlight (ed) i.e. (Green, Blue, Red, Yellow) WHY ?
I wrote: nowadays (2020s) microprocessor chips are designed & modeled by 90° for each side, think that light sheets are 90° diff to each other at the microprocessor chip's ZCS As (Green, Blue, Red, Yellow) ... ; sq. mm of the defined light sheets may diff among OEM (e.g. American Style, e.g. Chinese Style, e.g. Japanese Style, e.g. Korean style, ... ), therefore, we've the same (Syntax) HOW light sheets are, but, several sq. mm (shapes, sizes, styles) of the defined light sheets are (Semantics) ... ; for basic understanding of (Semantics, Syntax), also see: Syntax v s Semantics;
well trained kids! replied: arigatoh gozaimasu, thank you; Also see: Physics Law 179;

I / O bandwidth, i.e. 1.6 GB per second;

IFF computer () processor (Plastic Substrate Processor OR Silicon Processor) ... ; Organic Logic Devices;

In common, from pin number 1 to N number of pins for each processor provides functionalities of the processor, therefore, higher the pin number, more complexity regions exist in an engineering model; Basically, the usage "benchmarking" refers to "testing" of a processor, in common, throughputs, sampling rates, heat / thermal with size and weight, floating point processing speeds, Input and / or Output for each pin, and etc;

Integrated graphics interfaces, i.e. AGP 1x, 2x, 4x, ... ;

  INTEL ,    
I N T E L ,        
  Intel , processor ... ;

logo; key;

this DOMAIN idea processor's latches ... ;

L 1 . . . . .  
L 2 . . . . .  
L 3 . . . . .  
L 4 . . . . .  
L 5 . . . . .  
L 6 . . . . .  
L 7 . . . . .  
L 8 . . . . .  
L 9 . . . . .  

this DOMAIN Idea Processor's latches ... ;

artificial intelligence (IQ of computer) i.e. , 5W1H, _computer processes idea processor;

M C U and D S P have been engineered for motors with control, because motors' sensor send feedback info to processor, power amp "converter" also send feedback info to processor, ... ;

Memory support, i.e. D D R S D R A M 333 +;

motion processor ... , e.g. absolute location 95 3-D space, data 6964 (accelerometer, gyroscope, magnetometer, altimeter, ... ), 95form software (L B S), M E M S, on, TV (smart) control on-screen cursors 27, ... ;

Multimedia instruction support, i.e. MMX, SSE, SSE3, ... ;

N P U, Network Processor Unit, IP based packet's Ethernet (source AND destination) ... ;

IFF system (hybrid) either normal Ethernet switching operation, OR open flow operation;

Numbers of instructions per one clock cycle, i.e. 8 instructions;

Operating noise, adjusting low dB in numerological dimension ... also see: a k a .INF;

Operating pressure, i.e. 10 20 m b @ operating temperature;

Operating temperature, i.e. 0 °C ~ 100 °C, Sea-level product;

Pipelining i.e. one of the Architectures, since 1990s ... ; Also see: p Computer; 3pComputer;

Plastic Substrate Processor, also see: http://www2.imec.be; Silicon Processor; Organic Logic Devices;

processor a.k.a. OO              
IFF base ( CALCULATOR ) 101 OR 5  

Processor Category:

array processor; data processor; food processor; front end processor; front-end (processor) a.k.a. F E P; idea processor; language processor;  media processor; micro-processor a.k.a. M C U; print processor; processor board; processor bound; processor bus; processor card; processor handler; u n i-processor; vector processor; word processor; word-processor ;

(Processor, Server) dimensional 11x15, Using (MOBILE e.g. ( , , )), (NORMAL e.g. ( , , )) ... ;

Silicon Processor, also see: http://www.intel.com; Plastic Substrate Processor; Organic Logic Devices;

Size, i.e. Number mm x Number mm; i.e. 0.4mm pitch with 555 pin grid array ... ;


S P A R C, a processor, e.g. Fujitsu SPARC64X ... ; Fujitsu M10; Oracle S P A R C M5; Oracle S P A R C T5; IFF numerological dimension (17193), its internal address is; S P A R C;

システム(8; 16; 32; 64; 128; 256; ... ) using S E N OR MAN;

System bus speed, i.e. 400 + MHz;

Samsung Electronics
;     e.g. Exynos Processor ;      
  ( OEM ) Working with chrome ;  

IFF 286, 386, 486, 586, also see: 386; 386; WHERE x is numerological dimension (aggregate) 2,3,4,5, and then, 86 behaves multiplier (M U X i.e. mnemonic) alike ... ;

There is no 686, there is no 786, there is no 886, there is no 986, i.e. till early 21st century; Because, 10 dimension has been designed for thousands of years ... ; Therefore, no need to change numerological dimension (i.e. 10 dimension);

If you like to develop, 12 dimensional, 14 dimensional, 16 dimensional, ... do it yourself, and you must solve our universe's momentum and time line 1st, because, 2*5 has been 1 dimension,

and then if you choose to develop 2*6 and then develop 12 dimensional,

and then if you choose to develop 2*7 and then develop 14 dimensional,

and 16 dimensional and 18 dimensional are out of a Myanmar's knowledge;

wafer; duo-binary wafer;

Weight, i.e. 3 g @ 5 m;

WHEN an engineer needs a processor is WHEN 2 or more feedbacks exist to control a device, WHEN complexity regions are gathered for multiple processing e.g. while listening music, user may want to print, at the same time the user may want to browse Internet, a.k.a. 1 word "simultaneous", WHEN the most important time must be shared [HOW to share the most important time, also see: computers, satellite, server, ... ;

WHILE developing an algorithm, a mathematician does not care HOW to keep electro in WHICH solid stated material, vice versa, WHILE developing , , , theory, a.k.a. M Theoretical strings collision for each material, a material engineer does not care HOW to flow logic and WHICH computing numbers;

workload; workloads; e.g.

( workload, workload, workload, workload);

XP, Start >> Control Panel >> Performance and Maintenance >> System  check whether windows refreshing 2 times IFF EN language has been OS' default language, because e OR E context sensitive was compiled between cold boot and warm boot ... >> Hardware >> Device Manager >> Processors ... ;

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